Semiconductor devices typically comprise an integrated circuit die and a plastic chip carrier that is comprised of an organic substrate, such as polyimide, having metallic circuitry and wire bond pads disposed on a surface thereof. Frequently, one of the initial stages in assembly of the semiconductor device involves attachment of the chip carrier to a lead frame by means of a thixotropic organic adhesive such as, for example, an epoxy-based adhesive, an acrylic-based adhesive, or a silicone. During this process, which is referred to as the board-attach process, the adhesive is applied to the lead frame. Then the chip carrier is placed onto the adhesive. The assembly may then be heated to assist in cure of the adhesive, thereby strengthening the attachment between the organic substrate and the lead frame.
Adhesives are also used to attach the integrated circuit die to the circuitized surface of the chip carrier. Such adhesives, generally, contain an organic binder and an electrically or thermally conductive filler. The adhesive, which initially is in the form of a viscous liquid or paste, is distributed onto preselected regions on the circuitized surface. The preselected regions include chip pads which are formed by selectively plating gold on a nickel plated copper surface. Thereafter, the perimeter of integrated circuit die is aligned with and placed on the adhesive. The entire structure, including substrate, adhesive and die, is then baked to cure the adhesive, thereby strengthening the attachment between the integrated circuit die and the underlying substrate. In some cases, the integrated circuit die is then electrically connected to the electric circuitry of the carrier by wire bonding terminals on the chip to wire bond pads on the surface of the substrate.
Although the adhesives used during the various stages of assembling the resulting module are fairly viscous, the organic liquids in the adhesives have a propensity to bleed and spread out away from the point of attachment. For example, during the board attach process, these organic liquids often bleed out from the periphery of the chip carrier attachment site and spread up the edges of the chip carrier onto the circuitized upper surface, where the organic liquids can contaminate the wire bond pads and render them non-bondable. This condition, which is hereinafter referred to as "adhesive resin bleed", can cause significant problems during later assembly steps when the bond sites are needed to complete necessary electrical connections. The spreading organic liquid can also contaminate any portions of a soldermask which may lie in the near vicinity of the wire bond pads.
Adhesive resin bleed is also encountered during other stages of assembling the resulting module. For example, the resin in the electrically conductive or non-electrically conductive adhesive that is used to attach the integrated circuit die to the chip carrier can also bleed out during cure. The heat and pressure encountered during cure causes the resin to bleed out from the periphery of the die attachment area and spread out over adjacent areas where electrical connections ultimately need to be made.
The problems associated with adhesive resin bleed are even more pronounced when the chip carrier is treated with a plasma containing oxygen and/or argon, prior to the application of the adhesive. Such plasma treatment is frequently employed prior to assembly of the semiconductor module to clean the wire bond pads and to roughen the surface of the substrate. Adhesive resin bleed becomes an even greater problem when the surface of the substrate is roughened by pumice treatment.
Various methods for reducing contamination of the electrical bonding sites by adhesive resin bleed have been developed. For example, the chip carrier surface may have a recess at the point of attachment of the chip, such that the back of the chip and the adhesive will be positioned below the adjoining circuitized surface of the chip carrier where electrical bonding sites are located. Unfortunately, not all integrated circuit assemblies provide the option of a recessed cavity in the carrier surface. Very large scale integrated assemblies require a large number of bonding sites, and these sites, typically, are on the same level of the carrier surface as the chip attachment site.
In some instances mechanical barriers have been used to control adhesive resin bleed onto the bonding sites. For example, in U.S. Pat. No. 5,409,863 issued on Apr. 25, 1995, a low profile barrier, such as a solder mask ring surrounds the chip attachment site. During cure, the ring prevents the spread of adhesive resin onto the adjacent bonding sites on the chip carrier. Unfortunately, the ring does not completely prevent adhesive resin bleed when the chip carrier is treated with an oxygen or argon containing plasma.
Accordingly, a chip carrier having a surface that is resistant to adhesive resin bleed is desirable. Furthermore, a method of imparting adhesive resin repellency to the surface of the chip carrier and to the metallic components on the surface is desirable. A method which does not reduce the bondability of the wire bonding sites is especially desirable.